1. Field of the Invention
The present invention relates to circuits and methods for setting a digital potential at an integrated circuit output and/or a bi-directional input/output pin, and more particularly to pull up/pull down circuitry which holds a defined value at the output and/or bi-directional input/output pin during the power down of the integrated circuit.
2. Description of the Related Art
Presently many integrated circuits (ICs) are provided with capabilities for entering a power-down mode in order to save energy during phases of inactivity. During inactive power down modes, the output and/or bi-directional input/output pins of integrated circuits should keep their defined values, otherwise other parts of the system utilizing the integrated circuits may become corrupted. For example, random access memory (RAM) contents may be modified or even lost if the IC output pins in the system connected to RAM are allowed to change state during periods of inactivity.
On the other hand, it would be useful if the values kept at the output and/or bi-directional input/output pins of inactive integrated circuits may be allowed to be overwritten by other, perhaps active IC sections of a computer system. Thus, access to a device, e.g., RAM, may be achieved using connections to the powered down integrated circuit.
In conventional microprocessors however, the output drivers keep on driving the last value which was valid prior to entering the power-down mode. Typically this value cannot be overwritten, because normally, high current capacity output drivers are used for driving the prior valid value. Accordingly, it is then necessary to switch off the output completely before entering the power-down mode. If it is desired that the signal should be used by another active device during the power down mode of the inactive device, additional software must be provided for switching off an output driver prior to power down, and additional hardware may be required to keep a defined value on a circuit output pin which has been switched off. Accordingly, it would be desirable to provide logic for use with an integrated circuit pin for holding a defined value at that pin during a power-down mode. Additionally, it would be advantageous to hold the digital potential at the integrated circuit pin at either a current or last value driven prior to a power-down.
In a described embodiment, a circuit embodying the invention sets a digital potential at an integrated circuit output and/or bi-directional input/output pin in which pull up/pull down circuitry holds a defined value. Separate primary and secondary driver circuits set the output and/or bi-directional input/output pin when the integrated circuit is in particular modes of operation. Control logic is provided as being responsive to a change in the mode of operation of the integrated circuit from its active mode to its inactive mode for generating control signals relative to the state of the integrated circuit. The control logic is connected to pull-up and pull-down transistors of the secondary driver logic for pulling up and pulling down the output and/or bi-directional input/output pin. The second driver circuit transistors are of less current-sourcing capability than the primary inverter circuit for driving the output and/or bi-directional output/input pin while the integrated circuit is in its powered down mode of operation.
Briefly summarized, the present invention relates to a circuit and a method for setting a digital potential at an integrated circuit output and/or bi-directional input/output pin in which pull up/pull down circuitry holds a defined value at the output and/or bi-directional input/output pin during the power down of the integrated circuit. A primary driver responsive to a state of the integrated circuit sets the output and/or bi-directional input/output pin while the integrated circuit is in an active mode of operation, and secondary driver sets the output and/or bi-directional input/output pin while the integrated circuit is in an inactive mode of operation. Control logic is provided as being responsive to a change in the mode of operation of the integrated circuit from its active mode to its inactive mode for generating a control signal relative to the state of the integrated circuit. The secondary driver logic is responsive to the control signal generated by the control logic and the state of the integrated circuit upon the change in the mode of operation of the integrated circuit from a powered up mode to a powered down mode for driving the output and/or bi-directional input/output pin while the integrated circuit is in its inactive mode of operation.